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MyNOR Single Board Computer

This board is the heart of the MyNOR project. It contains the discrete CMOS logic CPU, volatile and non-volatile memory and I/O:

  • No CPU or MCU, no ALU, only one discrete NOR gate for computations
  • The 8-bit CPU is made of 15 CMOS logic chips, 2 transistors, a ROM and a RAM chip
  • additional 4 CMOS logic chips are used to provide digital I/O
  • 8 kB SRAM for CPU registers, program code and data
  • 32 kB ROM (OTP EPROM) for microcode and program storage
  • 64 kB EEPROM for 8 user programs, with auto-boot after power on
  • 4 MHz CPU clock, can be increased to 8 MHz if chips allow this speed
  • The CPU is able of doing up to 2600 8-bit additions per second at 4 MHz CPU clock
  • Hardware interrupts (except the non-maskable hardware reset) are not supported
  • A stack memory of 256 byte enables nested subroutine calls
  • Up to 24 digital outputs and 8 digital inputs with integrated pull-up's
  • RS232 interface with 2400 baud @ 4 MHz or 4800 baud @ 8 MHz
  • I2C and SPI interfaces to connect peripherals
  • Slim microcode architecture with 28 instructions
  • The microcode occupies only 9 kB of the ROM, 23 kB are free for the OS
  • The Operating System provides lots of useful API functions
  • The OS contains a calculator program that can do floating point calculations
  • The OS contains a monitor program which allows directly programming MyNOR in assembly
  • Software-upload is done via "cut-and-paste" of text-files into the terminal window
  • Vintage design that uses only through-hole components on a board with a size of 130x100 mm
  • Hardware simulator for Linux and (with limitation) for MS Windows available
  • Cross-Assembler for Linux and MS Windows available

The top and bottom side of the board are shown here. As you can see, there is no "hidden magic" like a microcontroller or something else on the board. And the big chip in the socket is also not an Atmel microcontroller, but it is an OTP EPROM (OTP stands for "one time programmable"):

Block Diagram

Here is an overview of the structure of the MyNOR CPU. Peripherals like connectors, RS232 line driver, I2C circuitry and the 64 kB EEPROM are not shown in the diagram:

If you want to understand how I implemented the CPU and how the CPU finally works, I recommend reading this PDF document: MyNOR-HowItWorks.pdf

The NOR Gate

The MyNOR computer is using a single NOR gate for all kind of computations, because every logical function can be performed by combining a couple of NOR (or NAND) functions. The big advantage of NOR is that a NOR gate can be constructed very easily with only two transistors and one resistor:

I have decided to use the small-signal MOSFET "BS170". This MOSFET has the advantage that it is a very fast, it has a relatively low RDSon, and it is a through-hole component. The disadvantage of this NOR gate construction is the relatively high power consumption caused by the 100 Ohm pull-up resistor. But with this strong pull-up the NOR gate can work with a clock frequency up to 10 MHz!

MyNOR uses this discrete NOR gate for the CPU instructions AND, OR, XOR, ADD and SUB. I have written a document that describes how these logic functions are implemented with NOR for a single bit: NOR-Logic. But because MyNOR is a 8-bit CPU, each bit of a byte has to travel several times through the NOR-gate. This is why MyNOR is so slow. The most challenging part of the project was to implement the 8-bit ADD instruction. Here is a document that describes how I have implemented the MyNOR ADD instruction.

A full-adder implemented with NOR gates:

Schematics and BOM

Click on the schematics to see it in full resolution (PDF).

I am designing all my PCBs with the great open source software KiCad. You can get the MyNOR design files in the download section.

All components can be sourced from Reichelt, Mouser or Digikey.

I have ordered the PCB at JLCPCB (china). They accept the gerber files that can be generated by KiCad (search on the JLCPCB website for help on how to generate gerber files with KiCad). JLCPCB is very cheap, you can get 5 PCBs including the costs for shipping for less than 17 Euro.

If you are interested in building your own MyNOR, I recommend reading the MyNOR Construction Manual. You can also contact me if you have any problems with sourcing the PCB raw cards or with the programming of the EPROM 27C256.

C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C20 C21 C22 C23 100 nF
C19 82 pF
D1 D2 3mm LED, red
D3 D4 BAT41
J1 J2 Header 2x10 pin, 2.54mm
J3 D-SUB-09 male connector
J4 USB type B mini connector
J5 2-pin screw terminal
Q1 Q2 Q3BS170
Q4 BC547B
R1 R2 100 Ohm
R3 R4 1 kOhm
R5 2.2 kOhm
R6 R7 R810 kOhm
R9 R10 8x 10 kOhm array
R11 150 kOhm
SW1 push button
U1 74HC 74
U11 U4 74HC 541
U13 74HC 138
U14 74HC 139
U2 U3 74HC 161
U5 U6 U7 U10 U17 U18 U19 U2074HC 574
U12 74HC 273
U8 74HC 14
U9 74HC 08
U22 74HC 32
U15 AT27C256-45PU (32kB EPROM)
U16 AS6C6264-55PCN (8kB SRAM)
U21 24LC256-I/P (64kB EEPROM)
X1 Oscillator 4.000 MHz


Before I have started building the first version of the MyNOR board, I wrote a software simulation of the MyNOR computer. I wrote a simulation for every logic gate, with real timing behaviour. I have found out that it should always be possible to clock the computer at 4 MHz (over the full temperature range). With good components and at 25 degrees celsius environment temperature the computer should also run at 8 MHz correctly. Today, with the real hardware on hand, I know that my assumptions were right.

If you want to understand the function of MyNOR in more detail, you should have a look at the waveform of the internal CPU signals when the CPU executes the first instructions:

EPROM AddressInstruction BytesDissassembly
(any) 0x00RST
0x24000x03, 0x19LDA #0x19
0x24020x01, 0x10, 0x5BLD R0, #0x5B
0x24050x01, 0x0F, 0x00LD FLAG, #0x00
0x24080x10, 0x10ADD R0
0x240A0x18, 0xNN, 0xNNJMP asm_entry

These instructions have no useful function, they are only for simulation purpose. The last instruction finally jumps to the entry point of the operating system.

The simulation generates this waveform file which can be displayed with the open source program GTKWave:

To understand what is going on here you need also the schematics and the source file that contains the microcode.

Instruction Set

MyNOR is a CISC (complex instruction set) CPU with von-Neumann architecture. Programcode and data are stored together in the same RAM. Furthermore the RAM is used to store the stack memory and also the CPU registers. Because CPU registers are stored in RAM, MyNOR is capable of dealing with up to 256 8-bit registers.

InstructionFunction InstructionFunction
LD reg,#Load register with immediate value SUB regSubtract register from ACCU (with carry)
LD reg,regLoad register with other register XOR regPerform XOR operation on ACCU and register
LDA #Load ACCU with immediate value CMP regCompare ACCU with register and set FLAG
LDA regLoad ACCU from register CMP #Compare ACCU with immediate value and set FLG
STA regStore ACCU to register TST regTest register for zero and set FLAG
LAPLoad ACCU through pointer JMP absUnconditional jump to absolut memory address
SAPStore ACCU through pointer JNF absJump to absolut memory address if FLAG = 0
ADD regAdd register to ACCU (with carry) JPF absJump to absolut memory address if FLAG = 1
AND regPerform AND operation on ACCU and register JSR absCall subroutine
DEC regDecrement register RETReturn from subroutine
INC regIncrement register RSTReset the CPU
OR regPerform OR operation on ACCU and register IO portInput or Output ACCU on port
ROL regRotate register left (with carry) PSH regPush register to stack
ROR regRotate register right (with carry) POP regPull register from stack

I have optimized the instruction set a lot, so programming becomes convenient and efficient. The Cross Assembler "myca" provides some special macro instructions to make programming even more convenient:

ADD #Add immediate value to ACCU
AND #Perform AND operation on ACCU and immediate value
OR # Perform OR operation on ACCU and immediate value
SUB #Subtract immediate value from ACCU (with carry)
XOR #Perform XOR operation on ACCU and immediate value
CLCClear (carry) FLAG
SECSet (carry) FLAG

If you are interested in a full description of the registers and the instruction set, please read the MyNOR-Instruction-Set documentation.

Software Upload to MyNOR

Loading an application program into MyNOR is very easy. This is done by simply copying the program into the terminal window. When you assemble your program with myca, the crossassembler outputs a text file that can be copied and pasted into the terminal window. But be patient - it takes a while to upload the program at 2400 baud. The example program below lets the two LEDs on the MyNOR board blink the SOS pattern.

I have developed a special text encoding for uploading binary data. Since MyNOR is very slow, it is very difficult to continuously poll the RS232 interface while doing other stuff in parallel. While the data is being received, the CRC checksum is computed and the received byte is stored into memory (which is a very slow operation). In order to have enough CPU power available, some receive bits are simply ignored by MyNOR - the text coded binary has dummy bits at the appropriate positions.


MyNOR Operating System

I wrote a simple "operating system" for MyNOR. It mainly contains many API functions that simplify the writing of application programs. But the OS also contains some useful functions for managing application programs in the on-board EEPROM. In addition to the operating system the ROM contains two application programs: A simple calculator program and a machine language monitor program. With the monitor program you can develop assembler programs directly on MyNOR. I myself learned assembler programming on a Commodore 64. Back then I entered the program code directly into a monitor program.

The following two pictures provide an overfew of the software integrated in the MyNOR EPROM. The first picture shows the main menu which is displayed when you press ENTER once to twice in the terminal program. The second picture shows the commands that are supported by the monitor.